The continuous shrinking in dimensions of electronic devices utilized in ultra large scale integrated (ULSI) circuits in recent years has resulted in increasing the resistance of the back-end-of-the-line (BEOL) metallization as well as increasing the capacitance of the intralayer and interlayer dielectric. This combined effect increases signal delays in ULSI electronic devices. In order to improve the switching performance of future ULSI circuits, low dielectric constant (k) insulators, particularly those with a dielectric constant significantly lower than silicon oxide, are needed to reduce the capacitances. Dielectric materials (i.e., dielectrics) that have low k values are commercially available. Most commercially available dielectric materials, however, are not thermally stable when exposed to temperatures above 300° C. Integration of low k dielectrics in present ULSI chips requires a thermal stability of at least 400° C.
The low k materials that have been considered for applications in ULSI devices include polymers containing atoms of Si, C, O and H, such as methylsiloxane, methylsilsesquioxanes, and other organic and inorganic polymers. For instance, an article by N. Hacker et al. “Properties of new low dielectric constant spin-on silicon oxide based dielectrics” Mat. Res. Soc. Symp. Proc. 476 (1997): 25 describes materials that appear to satisfy the thermal stability requirement, even though some of these materials propagate cracks easily when reaching thicknesses needed for integration in an interconnect structure when films are prepared by a spin-on technique.
The ability to fabricate a low k material by either a spin-on or a plasma enhanced chemical vapor deposition (PECVD) technique is an advantage. Despite the numerous disclosures of low k dielectric materials, there is a continued need to improve the properties of these materials. For example, a SiCOH dielectric material having a lower internal stress, improved thermal stability, lower cost, nanometer scale pore size, narrow distribution of pore size, homogeneous pore distributions throughout the film thickness, and better process control within processing temperatures used in current ULSI technologies are all needed.
It is commonly found when making SiCOH dielectrics by conventional spin-on techniques using various chemistries that the final film has a pore size distribution that is broader than desired, and often includes pores larger than 2 nm diameter.
It is also commonly found that SiCOH dielectrics made in the prior art from two or more separate organosilicon and/or porogen molecules are not uniform in atomic and structural composition, both when measured across the substrate diameter, and through the depth of the dielectric layer. The use of 300 mm Si wafers has made this problem of chemical uniformity across the wafer more pronounced.
Additionally, prior art CVD SiCOH dielectrics made from two or more separate organosilicon and/or porogen molecules were found to exhibit process variation or process instability due to small changes in the flow rate of one of the two precursors, known to those skilled in the art as drift in the flow rate. Moreover, prior art SiCOH dielectrics made from two or more separate organosilicon and/or porogen molecules in a PECVD process have been found to have a small component of larger pores due to the formation of dimers or trimers of the porogen in the PECVD reactor.
In view of the above, there is a need to provide a process to fabricate a layer of a SiCOH dielectric having improved film properties, that has an easily controlled, narrow, pore size distribution, and is uniform in atomic and structural composition, both when measured across the substrate diameter, and through the depth of the layer, which does not exhibit any variation in the process or process instability.